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Advanced manufacturing · Semiconductors

Nanoimprint lithography

Printing chip patterns by pressing a patterned mask into resist like a stamp, instead of projecting an image through lenses and mirrors.

Readiness · Estimate, not a measurementCanon commercialised the FPA-1200NZ2C in October 2023 and shipped one to the Texas Institute for Electronics in 2024, at 14 nm minimum linewidth — equivalent to a 5 nm node. That is a real machine doing real patterning, but not volume logic production: throughput, defectivity and the supply of 1:1 imprint masks are the open questions, and a stamp touching the wafer fails differently from light.By Substrata, open to challenge · 2026-09-18Supporting source → — Prototype at meaningful scale (Being proven)Report an error on GitHub

01What it would relieve

  • EUV lithography scannersHow this is computedSum of four judged scores, each 0–3: concentration + substitution + lead time + inelasticity.Method →Code →

    It patterns at leading-edge dimensions without an EUV scanner at all, so demand that today has exactly one supplier would have somewhere else to go.

  • EUV projection opticsHow this is computedSum of four judged scores, each 0–3: concentration + substitution + lead time + inelasticity.Method →Code →

    Canon states the transfer "does not go through an optical mechanism", so the mirror stack that only one company can polish is not in the path.

02How far off it is

judged 2026-09-18

6 / 9Prototype at meaningful scale

Canon commercialised the FPA-1200NZ2C in October 2023 and shipped one to the Texas Institute for Electronics in 2024, at 14 nm minimum linewidth — equivalent to a 5 nm node. That is a real machine doing real patterning, but not volume logic production: throughput, defectivity and the supply of 1:1 imprint masks are the open questions, and a stamp touching the wafer fails differently from light.

Source ↗

03What to watch for

A logic or memory maker putting NIL into volume production on a product line, rather than a research institute or a pilot.

04Who and what it would touch

each join carries its own evidence

EUV lithography scanners

Companies that make it today

sourced

What depends on it

primary source

Other science aimed at it
Nothing else is on record yet.
Who could fund relief
No funder is on record yet.
Where it comes from

directory join, not a sourced finding

What it holds up

the project's own model, not a measurement

EUV projection optics

Companies that make it today

sourced

What depends on it

primary source

Other science aimed at it
Nothing else is on record yet.
Who could fund relief
No funder is on record yet.
Where it comes from

directory join, not a sourced finding

What it holds up

the project's own model, not a measurement

05What this holds up

2 loops
  • Siliconone turn: Months

    would relieve EUV lithography scanners, which gates it.

    Worst judgement on this loop: How this is computedThe highest severity score among the bottlenecks recorded as gates on the loop.Method →Code →, judged 2026-09-15 · this join is source-backed readiness judgement

  • Siliconone turn: Months

    would relieve EUV projection optics, which gates it.

    Worst judgement on this loop: How this is computedThe highest severity score among the bottlenecks recorded as gates on the loop.Method →Code →, judged 2026-09-15 · this join is source-backed readiness judgement

A loop is one design, build and measure turn. Severity is a dated judgement on a 0–12 scale, not a measurement, and the judgements are not added together — the figure shown is the worst single one.

Discussion

Comments use threadkit (permission is participation). Sign in with OrangeCat to write. Fact-check is the same assistant as Ask, grounded in the corpus.

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